, on October 20, 2022, 02:23 PM

Decisions On-Demand to Power Semiconductor Manufacturing

Metrology is a fact of life in semiconductor manufacturing. There is no other way to assure process control and product quality. Historically, lot-based sampling has been sufficient for optimization purposes. Sometimes, however, wafer-based information becomes necessary to introduce special processing rules based on the quality of individual wafers and the specific needs of the fab. In practice, measuring every device on every wafer on every lot is not realistic. When conditions need to be evaluated at the individual wafer level, fabs often face:

  • longer than desired cycle times as a result of significantly increasing the sampling rate (the frequency of measuring individual wafers)
  • overburdening fab floor IT systems as a result of gathering and processing a high volume of live data-on-demand
  • increased capital expenditures to acquire additional metrology equipment

This issue is so prevalent in semiconductor manufacturing that SYSTEMA experts developed a system-agnostic solution capable of allowing production staff the flexibility to set their own rules for the processing of individual wafers, based on their specific requirements. This is accomplished using live data-on-demand which can be handled within SYSTEMA’s rule engine: Rule-Based Activities (RBA).

Having the ability to create ad-hoc processing rules on the fab floor provides production staff with the ultimate flexibility to experiment, iterate, and make adjustments to rules in real-time while also having a quick and easy way to revert to a previous rule if needed.

Wafer Quality is Indicative of Process Quality at the Equipment Level

Process quality at the equipment level affects wafer quality. Further, it is possible to process all wafers in the same lot, on the same piece of equipment, and get different results.

For example, consider multi-chamber tools on the fab floor. Each chamber has its own quirks where certain processes perform better in one chamber than another. For this reason, it’s important to know which wafers are processed in which chamber because one can’t reasonably expect that all wafers, when processed in different chambers, will be of similar quality. Wafer-based conditions at the process/equipment level are the foundation of “Smart Sampling” with RBA.

Smart Sampling for Semiconductor Manufacturing

Given the importance of associating process data with individual wafers, we can talk about how these details can be leveraged for “smart” sampling.

Smart sampling can be used to determine under which conditions measurement steps may be omitted or optimized based on process quality data at the wafer level. When process quality requirements are met, measurements do not need to be made on every wafer in a lot. By measuring only what is necessary cycle time decreases and less metrology equipment is required.

Measurement results can then be used to:

  • optimize the frequency of metrology steps; when the process is within SPC specification limits, the number of wafers/lots that are measured can be decreased
  • assess the quality of measured lots to determine if lot rework, downgrade, or product change is needed
  • qualify/validate process steps by evaluating the difference in measurements before and after the processing step
  • adapt process parameters to bring the process back to specifications

Even Smarter Sampling

Metrology results can be used to monitor the processes of individual equipment and ensure that the productive use of the equipment is increased through optimized sampling. RBA logs provide data regarding execution history and outcome, evaluation results, and information regarding decisions to omit or add metrology steps. Additionally, optimizations can be achieved for preventive maintenance, unsellable material usage, and timer management for lot holds.

Preventive Maintenance

Equipment maintenance can be anticipated and scheduled. By monitoring a process, it can be predicted when a tool has to be maintained. As process quality declines, a decision can be made as to when to schedule maintenance. Some manufacturers elect to set rules which allow the equipment to process material with lower process quality requirements in anticipation of the scheduled maintenance to maximize equipment utilization. Having the ability to determine in advance when a tool will require maintenance prevents costly unplanned downtimes.

Leveraging Unsellable Material

Special or “test” wafers can be prepared and set aside for measurements or productive but downgraded wafers can be marked as scrap but not removed from their carrier and then used in later metrology steps. This is particularly helpful when special destructive metrology is in place. Rule sets can be applied where unsellable wafers are identified and set aside for metrology. After a specified time threshold and if unsellable wafers are not available, rules can allow productive wafers to be used for measurement.

Auto-Hold Support

As lots move through process steps, there may be time-based dependencies where minimum times must be met or maximum times must not be exceeded. Rule-based timers can trigger specific actions when a time threshold is reached, such as the release of an operation or placing a lot on hold.

Optimized Sampling with SYSTEMA RBA

Metrology operations are expensive and time-consuming, and sampling can be used to eliminate the need to sample everything that is produced, thereby making optimizations to the production flow. Smart sampling with RBA takes optimization to the next level by evaluating process quality to optimize the sampling process so that only the necessary number of measurements take place. No more, no less. By pairing sampling optimization with RBA’s capabilities to apply user-created process rules, production time decreases, metrology equipment is kept to a minimum, and wafer-level data can be leveraged for other optimizations on the fab floor.

SYSTEMA specializes in supporting semiconductor manufacturers in achieving the IT capabilities necessary to address the needs of the complete semiconductor value chain from wafering to front-end through to back-end assembly and test.


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